pyVHDLModel.Association

This module contains parts of an abstract document language model for VHDL.

Associations are used in generic maps, port maps and parameter maps.

Classes

• AssociationItem: A base-class for all association items.

• GenericAssociationItem: A base-class for all generic association items used in generic map aspects.

• PortAssociationItem: A base-class for all port association items used in port map aspects.

• ParameterAssociationItem: A base-class for all parameter association items used in parameter map aspects.

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Classes

class pyVHDLModel.Association.AssociationItem(actual, formal=None)

A base-class for all association items.

Inheritance

Parameters:

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

__init__(actual, formal=None)

Initializes a VHDL model entity.

Parameters:

• parent – The parent model entity of this entity.

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

Return type:

None

__str__()

Return str(self).

Return type:

str

property Parent: ModelEntity

Read-only property to access the model entity’s parent element reference in a logical hierarchy (_parent).

Returns:

Reference to the parent entity.

_parent: ModelEntity

Reference to a parent entity in the logical model hierarchy.

class pyVHDLModel.Association.GenericAssociationItem(actual, formal=None)

A base-class for all generic association items used in generic map aspects.

Inheritance

Parameters:

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

property Parent: ModelEntity

Read-only property to access the model entity’s parent element reference in a logical hierarchy (_parent).

Returns:

Reference to the parent entity.

__init__(actual, formal=None)

Initializes a VHDL model entity.

Parameters:

• parent – The parent model entity of this entity.

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

Return type:

None

__str__()

Return str(self).

Return type:

str

_parent: ModelEntity

Reference to a parent entity in the logical model hierarchy.

class pyVHDLModel.Association.PortAssociationItem(actual, formal=None)

A base-class for all port association items used in port map aspects.

Inheritance

Parameters:

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

property Parent: ModelEntity

Read-only property to access the model entity’s parent element reference in a logical hierarchy (_parent).

Returns:

Reference to the parent entity.

__init__(actual, formal=None)

Initializes a VHDL model entity.

Parameters:

• parent – The parent model entity of this entity.

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

Return type:

None

__str__()

Return str(self).

Return type:

str

_parent: ModelEntity

Reference to a parent entity in the logical model hierarchy.

class pyVHDLModel.Association.ParameterAssociationItem(actual, formal=None)

A base-class for all parameter association items used in parameter map aspects.

Inheritance

Parameters:

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

property Parent: ModelEntity

Read-only property to access the model entity’s parent element reference in a logical hierarchy (_parent).

Returns:

Reference to the parent entity.

__init__(actual, formal=None)

Initializes a VHDL model entity.

Parameters:

• parent – The parent model entity of this entity.

• actual (BaseExpression | QualifiedExpression | FunctionCall | TypeConversion | Literal)

• formal (Symbol | None)

Return type:

None

__str__()

Return str(self).

Return type:

str

_parent: ModelEntity

Reference to a parent entity in the logical model hierarchy.