Coverage for pyVHDLModel/Predefined.py: 96%

48 statements  

« prev     ^ index     » next       coverage.py v7.6.9, created at 2024-12-20 22:13 +0000

1# ==================================================================================================================== # 

2# __ ___ _ ____ _ __ __ _ _ # 

3# _ __ _ \ \ / / | | | _ \| | | \/ | ___ __| | ___| | # 

4# | '_ \| | | \ \ / /| |_| | | | | | | |\/| |/ _ \ / _` |/ _ \ | # 

5# | |_) | |_| |\ V / | _ | |_| | |___| | | | (_) | (_| | __/ | # 

6# | .__/ \__, | \_/ |_| |_|____/|_____|_| |_|\___/ \__,_|\___|_| # 

7# |_| |___/ # 

8# ==================================================================================================================== # 

9# Authors: # 

10# Patrick Lehmann # 

11# # 

12# License: # 

13# ==================================================================================================================== # 

14# Copyright 2017-2024 Patrick Lehmann - Boetzingen, Germany # 

15# Copyright 2016-2017 Patrick Lehmann - Dresden, Germany # 

16# # 

17# Licensed under the Apache License, Version 2.0 (the "License"); # 

18# you may not use this file except in compliance with the License. # 

19# You may obtain a copy of the License at # 

20# # 

21# http://www.apache.org/licenses/LICENSE-2.0 # 

22# # 

23# Unless required by applicable law or agreed to in writing, software # 

24# distributed under the License is distributed on an "AS IS" BASIS, # 

25# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # 

26# See the License for the specific language governing permissions and # 

27# limitations under the License. # 

28# # 

29# SPDX-License-Identifier: Apache-2.0 # 

30# ==================================================================================================================== # 

31# 

32"""This module contains base-classes for predefined library and package declarations.""" 

33from typing import Iterable 

34 

35from pyTooling.Decorators import export 

36from pyTooling.MetaClasses import ExtendedType 

37 

38from pyVHDLModel import Library, Package, PackageBody, AllPackageMembersReferenceSymbol, PackageMemberReferenceSymbol 

39from pyVHDLModel.Name import SimpleName, SelectedName, AllName 

40from pyVHDLModel.Symbol import LibraryReferenceSymbol, PackageSymbol 

41from pyVHDLModel.DesignUnit import LibraryClause, UseClause 

42 

43 

44@export 

45class PredefinedLibrary(Library): 

46 """ 

47 A base-class for predefined VHDL libraries. 

48 

49 VHDL defines 2 predefined libraries: 

50 

51 * :class:`~pyVHDLModel.STD.Std` 

52 * :class:`~pyVHDLModel.IEEE.Ieee` 

53 """ 

54 

55 def __init__(self, packages) -> None: 

56 super().__init__(self.__class__.__name__, None) 

57 

58 self.AddPackages(packages) 

59 

60 def AddPackages(self, packages) -> None: 

61 for packageType, packageBodyType in packages: 

62 package: Package = packageType() 

63 package.Library = self 

64 self._packages[package.NormalizedIdentifier] = package 

65 

66 if packageBodyType is not None: 

67 packageBody: PackageBody = packageBodyType() 

68 packageBody.Library = self 

69 self._packageBodies[packageBody.NormalizedIdentifier] = packageBody 

70 

71 

72@export 

73class PredefinedPackageMixin(metaclass=ExtendedType, mixin=True): 

74 """ 

75 A mixin-class for predefined VHDL packages and package bodies. 

76 """ 

77 

78 def _AddLibraryClause(self, libraries: Iterable[str]): 

79 symbols = [LibraryReferenceSymbol(SimpleName(libName)) for libName in libraries] 

80 libraryClause = LibraryClause(symbols) 

81 

82 self._contextItems.append(libraryClause) 

83 self._libraryReferences.append(libraryClause) 

84 

85 def _AddPackageClause(self, packages: Iterable[str]): 

86 symbols = [] 

87 for qualifiedPackageName in packages: 

88 libName, packName, members = qualifiedPackageName.split(".") 

89 

90 packageName = SelectedName(packName, SimpleName(libName)) 

91 if members.lower() == "all": 91 ↛ 94line 91 didn't jump to line 94 because the condition on line 91 was always true

92 symbols.append(AllPackageMembersReferenceSymbol(AllName(packageName))) 

93 else: 

94 symbols.append(PackageMemberReferenceSymbol(SelectedName(members, packageName))) 

95 

96 useClause = UseClause(symbols) 

97 self._contextItems.append(useClause) 

98 self._packageReferences.append(useClause) 

99 

100 

101@export 

102class PredefinedPackage(Package, PredefinedPackageMixin): 

103 """ 

104 A base-class for predefined VHDL packages. 

105 """ 

106 

107 def __init__(self) -> None: 

108 super().__init__(self.__class__.__name__, parent=None) 

109 

110 

111@export 

112class PredefinedPackageBody(PackageBody, PredefinedPackageMixin): 

113 """ 

114 A base-class for predefined VHDL package bodies. 

115 """ 

116 

117 def __init__(self) -> None: 

118 packageSymbol = PackageSymbol(SimpleName(self.__class__.__name__[:-5])) 

119 super().__init__(packageSymbol, parent=None)