Code Coverage Report

Package	Statments					Branches
Module	Total	Excluded	Covered	Missing	Coverage	Total	Covered	Partial	Missing	Coverage
📦pyVHDLModel	1186	0	802	384	67.6%	486	273	55	213	67.5%
⚙️Association	53	0	52	1	98.1%	12	11	1	1	100.0%
⚙️Base	225	0	219	6	97.3%	26	23	3	3	100.0%
⚙️Common	151	0	150	1	99.3%	16	16	0	0	100.0%
⚙️Concurrent	355	2	347	8	97.7%	60	48	12	12	100.0%
⚙️Configuration	95	0	95	0	100.0%	14	14	0	0	100.0%
⚙️Declaration	91	0	67	24	73.6%	4	2	0	2	50.0%
⚙️DesignUnit	307	0	281	26	91.5%	34	30	2	4	94.1%
⚙️Exception	132	0	90	42	68.2%	0	0	0	0	0.0%
⚙️Expression	493	0	491	2	99.6%	12	10	2	2	100.0%
⚙️IEEE	264	0	230	34	87.1%	14	10	4	4	100.0%
⚙️Instantiation	58	0	58	0	100.0%	4	4	0	0	100.0%
⚙️Interface	264	0	256	8	97.0%	18	17	1	1	100.0%
⚙️Name	86	0	86	0	100.0%	6	6	0	0	100.0%
⚙️Namespace	139	0	130	9	93.5%	36	33	3	3	100.0%
⚙️Object	67	0	67	0	100.0%	2	2	0	0	100.0%
⚙️PSLModel	36	0	30	6	83.3%	0	0	0	0	0.0%
⚙️Predefined	49	0	48	1	98.0%	8	7	1	1	100.0%
⚙️Regions	216	0	198	18	91.7%	84	74	6	10	95.2%
⚙️STD	88	0	88	0	100.0%	0	0	0	0	0.0%
⚙️Sequential	277	0	274	3	98.9%	24	20	2	4	91.7%
⚙️Subprogram	92	0	90	2	97.8%	16	15	1	1	100.0%
⚙️Symbol	301	0	301	0	100.0%	4	4	0	0	100.0%
⚙️Type	194	0	191	3	98.5%	12	12	0	0	100.0%
Overall (24 files):	5219	2	4641	578	88.9%	892	631	93	261	81.2%

Code Coverage	Coverage Level
≤10 %	almost unused
≤20 %	almost unused
≤30 %	almost unused
≤40 %	poorly used
≤50 %	poorly used
≤60 %	somehow used
≤70 %	somehow used
≤80 %	somehow used
≤85 %	well used
≤90 %	well used
≤95 %	well used
≤100 %	excellently used

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Code coverage report generated with pytest, Coverage.py and visualized by sphinx-reports.