Documentation Coverage Report
| Filename | Total | Covered | Missing | Coverage in % |
|---|---|---|---|---|
| 📦pyVHDLModel | 113 | 92 | 21 | 81.4% |
| ⚙️Association | 9 | 5 | 4 | 55.6% |
| ⚙️Base | 54 | 36 | 18 | 66.7% |
| ⚙️Common | 17 | 6 | 11 | 35.3% |
| ⚙️Concurrent | 91 | 18 | 73 | 19.8% |
| ⚙️Declaration | 13 | 5 | 8 | 38.5% |
| ⚙️DesignUnit | 71 | 28 | 43 | 39.4% |
| ⚙️Exception | 44 | 23 | 21 | 52.3% |
| ⚙️Expression | 162 | 13 | 149 | 8.0% |
| ⚙️IEEE | 69 | 38 | 31 | 55.1% |
| ⚙️Instantiation | 13 | 1 | 12 | 7.7% |
| ⚙️Interface | 33 | 6 | 27 | 18.2% |
| ⚙️Name | 31 | 11 | 20 | 35.5% |
| ⚙️Namespace | 10 | 1 | 9 | 10.0% |
| ⚙️Object | 21 | 11 | 10 | 52.4% |
| ⚙️PSLModel | 11 | 1 | 10 | 9.1% |
| ⚙️Predefined | 11 | 5 | 6 | 45.5% |
| ⚙️Regions | 15 | 2 | 13 | 13.3% |
| ⚙️STD | 11 | 8 | 3 | 72.7% |
| ⚙️Sequential | 79 | 12 | 67 | 15.2% |
| ⚙️Subprogram | 20 | 2 | 18 | 10.0% |
| ⚙️Symbol | 66 | 14 | 52 | 21.2% |
| ⚙️Type | 64 | 8 | 56 | 12.5% |
| Overall (23 files): | 1028 | 346 | 682 | 33.7% |
| Documentation Coverage | Coverage Level |
|---|---|
| ≤10 % | almost undocumented |
| ≤20 % | almost undocumented |
| ≤30 % | almost undocumented |
| ≤40 % | poorly documented |
| ≤50 % | poorly documented |
| ≤60 % | roughly documented |
| ≤70 % | roughly documented |
| ≤80 % | roughly documented |
| ≤85 % | well documented |
| ≤90 % | well documented |
| ≤95 % | well documented |
| ≤100 % | excellent documented |
Documentation coverage generated with “””docstr-coverage””” and visualized by sphinx-reports.