Documentation Coverage
Documentation coverage generated by docstr-coverage.
Filename |
Total |
Covered |
Missing |
Coverage in % |
|---|---|---|---|---|
📦pyVHDLModel |
112 |
93 |
19 |
83.0% |
Association |
9 |
5 |
4 |
55.6% |
Base |
54 |
36 |
18 |
66.7% |
Common |
14 |
5 |
9 |
35.7% |
Concurrent |
91 |
18 |
73 |
19.8% |
Declaration |
13 |
5 |
8 |
38.5% |
DesignUnit |
73 |
32 |
41 |
43.8% |
Exception |
41 |
23 |
18 |
56.1% |
Expression |
153 |
13 |
140 |
8.5% |
IEEE |
56 |
32 |
24 |
57.1% |
Instantiation |
13 |
1 |
12 |
7.7% |
Interface |
33 |
6 |
27 |
18.2% |
Name |
31 |
11 |
20 |
35.5% |
Namespace |
10 |
1 |
9 |
10.0% |
Object |
21 |
11 |
10 |
52.4% |
PSLModel |
11 |
1 |
10 |
9.1% |
Predefined |
11 |
5 |
6 |
45.5% |
Regions |
14 |
2 |
12 |
14.3% |
STD |
11 |
8 |
3 |
72.7% |
Sequential |
79 |
12 |
67 |
15.2% |
Subprogram |
20 |
2 |
18 |
10.0% |
Symbol |
66 |
14 |
52 |
21.2% |
Type |
64 |
8 |
56 |
12.5% |
Overall (23 files): |
1000 |
344 |
656 |
34.4% |