Documentation Coverage
Documentation coverage generated by docstr-coverage.
Filename |
Total |
Covered |
Missing |
Coverage in % |
|---|---|---|---|---|
📦pyVHDLModel |
108 |
89 |
19 |
82.4% |
Association |
9 |
5 |
4 |
55.6% |
Base |
54 |
36 |
18 |
66.7% |
Common |
14 |
5 |
9 |
35.7% |
Concurrent |
91 |
18 |
73 |
19.8% |
Declaration |
13 |
5 |
8 |
38.5% |
DesignUnit |
68 |
26 |
42 |
38.2% |
Exception |
41 |
23 |
18 |
56.1% |
Expression |
153 |
13 |
140 |
8.5% |
IEEE |
43 |
26 |
17 |
60.5% |
Instantiation |
13 |
1 |
12 |
7.7% |
Interface |
31 |
6 |
25 |
19.4% |
Name |
31 |
11 |
20 |
35.5% |
Namespace |
10 |
1 |
9 |
10.0% |
Object |
21 |
11 |
10 |
52.4% |
PSLModel |
11 |
1 |
10 |
9.1% |
Predefined |
11 |
5 |
6 |
45.5% |
Regions |
14 |
2 |
12 |
14.3% |
STD |
11 |
8 |
3 |
72.7% |
Sequential |
79 |
12 |
67 |
15.2% |
Subprogram |
20 |
2 |
18 |
10.0% |
Symbol |
57 |
14 |
43 |
24.6% |
Type |
64 |
8 |
56 |
12.5% |
Overall (23 files): |
967 |
328 |
639 |
33.9% |