Similar to opencores.org, freerangefactory.org/core or librecores.org, yet another attempt at building a registry of open source VHDL cores, simulation models and implementation constraints.

NEORV32: 32-bit RISC-V soft-core CPU and microcontroller-like SoC in VHDL @umarcor
#36 1 0 · 2022/02/05 stnolting/neorv32 · tags: neorv32, riscv, vhdl, cpu, soc, wishbone, stream, custom-function, CFU, PWM, SPI, TRNG, NEOLED, TWI, gdb, OCD
VHDL/Verilog Cryptography cores incl. co-simulation with openSSL through GHDLs VHPIdirect @tmeissner
#24 3 0 · 2020/11/30 tmeissner/cryptocores · tags: vhdl, ghdl, psl, yosys, verification, assertions, cryptography
Microwatt and GHDL - An Open Hardware CPU written in VHDL, Synthesized with Open Source Tools @umarcor
#21 3 0 · 2020/10/27 antonblanchard/microwatt · tags: microwatt, ghdl, simulation, synthesis, power, openisa