NEORV32: 32-bit RISC-V soft-core CPU and microcontroller-like SoC in VHDL @umarcor
OSVVM & UVVM: Differences and Unification @umarcor
Joint ICTP, SAIFR and UNESP School on Systems-on-Chip, Embedded Microcontrollers and their Applications in Research and Industry @umarcor
#31 0 0 · 2021/10/21 · tags: vhdl, workshop, synthesis, simulation, fpga, foss, ghdl
Mixed HDL on Fomu, with GHDL and Yosys @umarcor
VHDL/Verilog Cryptography cores incl. co-simulation with openSSL through GHDLs VHPIdirect @tmeissner
VHDL needs you! @umarcor
#22 2 0 · 2020/11/13 · tags: vhdl, LRM, VASG, LaTeX, GitLab
What are the chances of having sb_ice40_components_syn.vhd freely distributed for the benefit of the community? @umarcor