pyVHDLModel.Regions
This module contains parts of an abstract document language model for VHDL.
tbd.
Classes
ConcurrentDeclarationRegionMixin
: Undocumented.
Classes
- class pyVHDLModel.Regions.ConcurrentDeclarationRegionMixin(declaredItems=None)[source]
Inheritance
- Parameters:
declaredItems (Iterable | None)
-
_types:
Dict
[str
,FullType
] Dictionary of all types declared in this concurrent declaration region.
-
_subtypes:
Dict
[str
,Subtype
] Dictionary of all subtypes declared in this concurrent declaration region.
-
_constants:
Dict
[str
,Constant
] Dictionary of all constants declared in this concurrent declaration region.
-
_signals:
Dict
[str
,Signal
] Dictionary of all signals declared in this concurrent declaration region.
Dictionary of all shared variables declared in this concurrent declaration region.
-
_functions:
Dict
[str
,Dict
[str
,Function
]] Dictionary of all functions declared in this concurrent declaration region.
-
_procedures:
Dict
[str
,Dict
[str
,Procedure
]] Dictionary of all procedures declared in this concurrent declaration region.
- IndexDeclaredItems()[source]
Index declared items listed in the concurrent declaration region.
- Return type:
Algorithm
Iterate all declared items:
Every declared item is added to
_namespace
.If the declared item is a
FullType
, then add an entry to_types
.If the declared item is a
SubType
, then add an entry to_subtypes
.If the declared item is a
Function
, then add an entry to_functions
.If the declared item is a
Procedure
, then add an entry to_procedures
.If the declared item is a
Constant
, then add an entry to_constants
.If the declared item is a
Signal
, then add an entry to_signals
.If the declared item is a
Variable
, TODO.If the declared item is a
SharedVariable
, then add an entry to_sharedVariables
.If the declared item is a
File
, then add an entry to_files
.If the declared item is neither of these types, call
_IndexOtherDeclaredItem()
.
Derived classes may override this virtual function.
See also
pyVHDLModel.Design.IndexPackages()
Iterate all packages in the design and index declared items.
pyVHDLModel.Library.IndexPackages()
Iterate all packages in the library and index declared items.
pyVHDLModel.Library._IndexOtherDeclaredItem()
Iterate all packages in the library and index declared items.